1. Field of the Invention
Generally, the present disclosure relates to the manufacturing of integrated circuits, and, more particularly, to the creation of reticles for use in photolithography processes that include one or more test cells.
2. Description of the Related Art
Integrated circuits typically include a large number of circuit elements which include, in particular, field effect transistors. Other types of circuit elements which may be present in integrated circuits include capacitors, diodes and resistors. The circuit elements in an integrated circuit may be electrically connected by means of electrically conductive metal lines formed in a dielectric material, for example, by means of damascene techniques. The electrically conductive metal lines may be provided in a plurality of interconnect layers that are stacked on top of each other above a substrate in and on which the circuit elements are formed. Metal lines in different interconnect layers may be electrically connected with each other by means of contact vias that are filled with metal.
For the formation of integrated circuits, techniques of photolithography may be used. In a photolithography process, a reticle (sometimes also denoted as “photomask”) is projected to a layer of a photoresist that is provided over a wafer. The wafer may include one or more integrated circuits in a stage of a manufacturing process. Portions of the photoresist are irradiated with electromagnetic radiation that is used for projecting the reticle to the photoresist. Other portions of the photoresist are not irradiated, wherein the pattern of irradiated and non-irradiated portions of the photoresist depends on a pattern of reticle features provided on the reticle.
Thereafter, the photoresist can be developed. Depending on whether a negative or a positive photoresist is used, in the development process, either the non-irradiated portions or the irradiated portions of the photoresist are dissolved in a developer and, thus, are removed from the semiconductor structure.
Thereafter, processes for patterning the semiconductor structure can be performed using the portions of the photoresist remaining on the wafer as a photoresist mask. The processes for patterning the semiconductor structure may include one or more etch processes. Thus, features can be formed on the wafer.
In the formation of small features by means of photolithography processes, optical proximity correction (OPC) techniques may be used. In OPC techniques, shapes of reticle features that are provided on the reticle may be modified compared to shapes of target features that are to be formed in the photoresist mask on the wafer in order to compensate for image errors in the projection of the reticle to the photoresist on the wafer and/or other process errors.
Furthermore, resolution enhancement techniques may be used, wherein assist features, which are sometimes also denoted as “sub resolution assist features” (SRAFs), are provided on the reticle in addition to printing reticle features which are employed for forming photoresist features of the photoresist mask. Assist features may be small reticle features which may, for example, have a bar shape and which are provided on the reticle in the vicinity of the printing reticle features. When the reticle is used in a photolithography process, typically no photoresist features corresponding to the assist features are formed in the photoresist mask. However, the presence of assist features may reduce a sensitivity of the photolithography process with respect to variations of parameters of the photolithography process, which may include, in particular, a focus of the projection and a dose of the radiation used for projecting the reticle to the photoresist.
Techniques for performing OPC include rule-based OPC processes and model-based OPC processes. In rule-based OPC processes, edges of reticle features may be moved relative to edges of target features and/or additional polygons may be added to the reticle features. The movement of edges and/or the addition of polygons may be performed on the basis of a set of rules that is defined by a rule script. The rules may include, for example, an addition of serifs at convex corners of reticle features, a removal of portions of reticle features at concave corners or a modification of a size of reticle features, for example, an increase of a size of reticle features that are provided for forming photoresist features employed in the formation of isolated contact vias.
In model-based OPC techniques, a simulation of a photolithography process, that may include a simulation of the formation of an aerial image by the optical system of the photolithography tool and/or a simulation of the behavior of the photoresist, may be performed, and a modification of the shapes of the reticle features compared to the shapes of the target features may be performed on the basis of results of the simulation so that a better agreement between the shapes of the photoresist features in the photomask with the shapes of the target features is obtained.
An inclusion of assist features may also be performed in accordance with rule-based techniques or model-based techniques.
For monitoring the performance of photolithography processes, measurements of critical dimension uniformity (CDU) may be performed, wherein dimensions of test features on a reticle and/or test features on a wafer that are formed using the reticle are measured for assessing a quality of the reticle and/or a quality of the manufacturing process that was employed for the formation of the test features on the wafer.
The test features may be provided in test cells, wherein one or more test cells may be provided on the reticle. The test cells may include arrangements of test features adapted for reticle CDU measurements, wherein critical dimensions of reticle features are measured on the reticle, and test features adapted for wafer CDU measurements that may be used for forming test structures on a wafer. Critical dimensions of the test structure on the wafer may then be measured. Furthermore, test features for measuring a reticle registration may be provided in the test cells.
Known techniques for providing test cells may have disadvantages associated therewith, which may include a relatively large amount of space required on the reticle and the wafer for the test cells, which may be aggravated by the placement of the test cells in frames. Furthermore, the formation of known test cells may have difficulties associated therewith, which may be caused by limitations of OPC and/or dose mapper (DOMA) compensation techniques in the formation of the reticles by means of electron beam lithography, in particular when techniques of the 28 nm technology node or below are used. Furthermore, known test cells do not allow a process monitoring of etch processes and an erosion monitoring of chemical mechanical polishing processes that are performed in semiconductor manufacturing processes.
The present disclosure provides reticles, systems including a plurality of reticles and methods that may help to overcome or at least reduce some or all of the above-mentioned issues.